Platforms
Hosted on Sun SPARC Solaris, IBM PC GNU/Linux, and IBM PC Windows 2000.
What is the ERC32?
The ERC32 is a three-chip computing core implementing a SPARC V7
processor and associated support circuitry for embedded space applications.
The integer and floating-point units (90C601E & 90C602E) are based on the
Cypress 7C601 and 7C602, with
additional error-detection and recovery functions. The memory controller (MEC)
implements system support functions such as address decoding, memory
interface, DMA interface, UARTs, timers, interrupt control,
write-protection, memory reconfiguration and error-detection and
reconfiguration. The core is designed to work at 25MHz, but using space
qualified memories will limit the system frequency to around 15 MHz,
resulting in a performance of 10 mips and 2 mflops.
A 35 MHz / 25 mips single-chip version of the ERC32 (TSC695E)
replaces the three-chip set, and is available as a starter kit from
Atmel (Temic Semiconductors).
